Beckhoff EL1262 | EtherCAT Terminal, 2-channel digital input, 24 V DC, 1 µs, oversampling

The EL1262 digital input terminal acquires the fast binary 24 V control signals

from the process level and transmits them, in an electrically isolated form,

to the controller. The EtherCAT Terminal has two channels that indicate their

signal state via light emitting diodes. The signals are sampled with a

configurable, integer multiple (oversampling factor: n) of the bus cycle frequency

(n microcycles per bus cycle). For each bus cycle, the EtherCAT Terminal

generates a process data block that is transferred collectively during the next

bus cycle. The timebase of the terminal can be synchronized precisely with

other EtherCAT devices via distributed clocks. This XFC procedure enables the

temporal resolution of the digital input signals to be increased to n times the

bus cycle time.

The 8-channel digital input terminal EL1258-0010 acquires fast binary control

signals from the process level and transmits them, in an electrically isolated

form, to the controller. The EL1258-0010 is the ground switching version of

the EL1258 and offers not only a higher channel density compared to the

EL1252. but also higher performance due to the multi-timestamp function.

Whereas the EL1252 can accept one edge change with timestamp per bus

cycle, the EL1258-0010 offers the possibility to register up to 32 events with

timestamps. The EL1258-0010 is synchronized with other EtherCAT devices

through the distributed clocks system, so that events in the whole system

can be measured with a uniform timebase.The EL1252-0050 digital input

terminal acquires the fast binary 5 V control signals from the process level

and transmits them, in an electrically isolated form, to the controller.

The EtherCAT Terminal has two channels that indicate their signal state via

light emitting diodes. The signals are furnished with a time stamp that

identifies the time of the last edge change with a resolution of 1 ns.

With this XFC technology, signal characteristics can be traced exactly

in time and correlated with the distributed clocks system-wide. With this

technology, machine-wide parallel hardware wiring of digital inputs or encoder

signals for synchronization purposes is often no longer required.

The switching thresholds of the input circuit are based on the CMOS level:

Signal voltage "0" < 0.8 V, signal voltage "1" > 2.4 V. The 5 V supply voltage

can be generated by the EL9505 power supply terminal and fed into the power

contacts.

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