GE VMIVME-2536 32-Channel Optically Coupled Digital I/O Board with Built-in-Test

The GE Fanuc / VMIC PCI-5565 Reflective Memory interface allows data to be shared between up to 256 independent 

systems (nodes) at rates up to 174 Mbyte/s. 

Each Reflective Memory board may be configured with 64 Mbyte to 256 Mbyte of onboard SDRAM. 

The local SDRAM provides fast Read access times to stored data. 

Writes are stored in local SDRAM and broadcast over a high speed fiber-optic data path to other Reflective Memory nodes. 

The transfer of data between nodes is software transparent, so no I/O overhead is required. 

Transmit and Receive FIFOs buffer data during peak data rates to optimize the host computer and bus performance to maintain high data throughput.

Applications:

Factory Automation and Instrumentation

Process Control

Laboratory Instrumentation

Machine Monitoring

Data Acquisition

Features:

• Network Transfer Rate 43 Mbyte/s (4 Byte Packets) to 174 Mbyte/s (64 Byte Packets)

• Dynamic Packet Size, 4 to 64 bytes of Data

• Connection with Multimode Fiber up to 300m, Single Mode Fiber Up to 10km

• Up to 256 Nodes

A few key benefits of the CPCI-7055RC, that help make this SBC the market leader, are highlighted below: 

• High performance control and data/vector processing available on the IBM 750 processor 

permit integration of computing functions and data processing in a single slot. 

• Extensive peripheral interfaces simplify system configuration and reduce the number of 

hardware pieces required to implement your solution. 

• High-density non-volatile storage options provide the flexibility for stand-alone operations 

or extensive data logging. 

• User configurable PICMG 2.16, providing Ethernet across the backplane as well as 

supporting PICMG 2.1 Rev. 1.0 CompactPCI Hot Swap and IPMI PICMG 2.9 giving system-level 

flexibility for multiple CompactPCI system functions. 

• Onboard monitoring of temperature and voltages with software access enables 

application-dependent environmental solutions.

The two board set is configured with one board designated for the primary chassis while the other board is designated for the secondary chassis. 

A master VME chassis can communicate with several secondary chassis by using multiple REPEATER Links in a star configuration.

The link is software transparent. Any VME master in the primary chassis may access (read or write) to any slave board in the secondary chassis. 

Only non-interrupting slave boards are allowed in the secondary chassis. 

The link between the primary chassis and secondary chassis is automatically established when a VME 

master (typically a CPU board) addresses any board in the secondary chassis.

Any time a master in the primary chassis issues a VME read/write cycle, it will be repeated to the secondary chassis. 

If a slave board in any secondary chassis responds to that address, 

the data transfer (read or write) will occur between the chassis and a Data Transfer Acknowledge (DTACK) will be generated to the master (in primary chassis) to complete the cycle.

A link consists of two boards (VMIVME-5531M and VMIVME-5531S) and two cables which enable a VME system to be expanded beyond a single chassis.

A link reset switch located on the front panel of the VMIVME-5531M allows the user to assert SYSRESET in the secondary 

chassis without resetting the primary (or additional secondary chassis in multiple link configurations). 

When SYSRESET is asserted in the primary chassis it is repeated to all secondary chassis.

Both the VMIVME-5531M and VMIVME-5531S have a bi-color LED which indicates the status of the link. 

We have the same series of models in stock.  If you don't find the model you need, please contact us and we will provide you with an official quotation！