Power Engineering 
K-JIANG
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GE IC660ELB912J MICRO GENIUS PWB
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GE IC660ELB912J MICRO GENIUS PWB

+86-18144100983
kongjiangauto@163.com
wind, petroleum, chemical, natural gas, Marine, mining, aviation, electronics, steel, nuclear power, electric power, coking, air separation and so on
PLC, DCS, servo, analog, Ethernet, digital, redundant module, tension system, excitation, generator management, human-machine interface, detection card, sensor, AC drive, etc
IC660ELB912J
U.S.$10055.00
U.S.$4548.00
Weight:0.000KG
Quantity:
(Inventory: 5)
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Product parameters
  • Tell:+86-18144100983
  • email:kongjiangauto@163.com
  • Application:wind/ petroleum/ chemical/ natural gas/ Marine/ mining/ aviation/ electronics/ steel/ nuclear power/ electric power/ coking/ air separation and so on
  • Series:PLC/ DCS/ servo/ analog/ Ethernet/ digital/ redundant module/ tension system/ excitation/ generator management/ human-machine interface/ detection card/ sensor/ AC drive/ etc
Feature
IC660ELB912J

Part Number IC660ELB912J Manufacturer General Electric Country of Manufacture As Per GE Manufacturing Policy Series Mark VI/VIe Function Module Availability In StockIC660ELB912 is a Micro Genius Network Interface board designed to function as a daughterboard in a user's microprocessor system. It connects the Micro Genius and the motherboard in any CPU-type device capable of reading and writing to the Micro Genius's general-purpose shared RAM. This device, referred to as the host, allows the Micro Genius to manage data exchanges between the host and the Genius I/O bus, freeing up the host to control remote I/O. The Micro Genius provides high reliability and noise immunity while handling Genius I/O features. Functional Description In a user microprocessor system, the GE Fanuc uGENI network interface block serves as a daughterboard. It can interface with any CPU that can read and write to the uGENI's general-purpose shared RAM. The host device manages all transfers between the host and the Genius I/O block. IC660ELB912 Features The host can use the Genius LAN's communication features to communicate with other hosts. The Micro Genius acts as a general-purpose controller, managing initialization and faults for over 30 additional bus devices.

Each device controls an I/O, and the Micro Genius maintains updated images of each device. It can also communicate with other controllers using Global Data, datagrams, and Directed Control Data messages. On its single-printed circuit board, the Micro Genius includes sophisticated components such as the 6303 serial interface CPU, which manages the MIT chip and provides bus hardware interface support services like error checking, LED drivers, and timers. A transmit/receive circuit closely monitors MIT and bus transmit/receive signals. The Micro Genius uses dual-port RAM to exchange data between the 6303 microprocessor and the 64180 manager microprocessor. The dual-port RAM ensures equal access for the two processors, managed by a GAL that allocates memory to either CPU byte by byte. The 64180 processor has its own 8KB of RAM for its operations. IC660ELB912 Mounting The Micro Genius should be mounted to the motherboard using spacers. Screws, standoffs, or plastic PCB supports should be inserted into the four corner holes of the motherboard for proper mounting. Sticky products should not be used on the board, and it should not be installed in a way that obstructs airflow. Ensure the board is not mounted within 1/8 inch of any other board or component on the motherboard. It requires a 5V DC supply for logic power. Compatibility The Micro Genius supports handheld displays and has backward compatibility for blocks. The isolated block configures both inputs and outputs. The Host remains uninterrupted by the PCIM Manager. The device transmits Broadcast Control data and handles I/O circuit updates as part of the communication process. The shared RAM is split into two tables for efficient data management. Product Attributes Communicates with other controllers using universal data. Provides high reliability. Controls the hardware interface using an MIT chip.

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