Technical Information
Form Factor: Standard single QMC conforming to VITA 93.0
Board size: 78.25 mm x 26 mm
PCI Express 2.1 compliant interface
Artix-7 User programmable FPGA
Xilinx XC7A50T-2
PCIe endpoint in FPGA
128 Mbit SPI-EEPROM for FPGA configuration and User Data
Digital I/O
32 ESD-protected 5 V-tolerant TTL lines (-10R)
16 differential EIA-422 / EIA-485 lines (-11R)
16 differential M-LVDS lines (-12R)
Direction individually programmable
Operating temperature -40 °C to +85 °C
Order Information
Digital I/O
32 ESD-protected 5 V-tolerant TTL lines (-10R)
16 differential EIA-422 / EIA-485 lines (-11R)
16 differential M-LVDS lines (-12R)
Direction individually programmable
Operating temperature -40 °C to +85 °C
RoHS Compliant
TQMC600-10R-A 32 TTL I/O, Artix-7 7A50T FPGA, air cooled
TQMC600-10R-H 32 TTL I/O, Artix-7 7A50T FPGA, conduction cooled
TQMC600-11R-A 16 differential EIA-422 / EIA-485 I/O, Artix-7 7A50T FPGA, air cooled
TQMC600-11R-H 16 differential EIA-422 / EIA-485 I/O, Artix-7 7A50T FPGA, conduction cooled
TQMC600-12R-A 16 differential M-LVDS I/O, Artix-7 7A50T FPGA, air cooled
TQMC600-12R-H 16 differential M-LVDS I/O, Artix-7 7A50T FPGA, conduction cooled
For the availability of non-RoHS compliant (leaded solder) products please contact TEWS.
Software
TDRV020-SW-25 Integrity Software Support
TDRV020-SW-42 VxWorks Software Support
TDRV020-SW-65 Windows Software Support
TDRV020-SW-82 Linux Software Support
TDRV020-SW-95 QNX Software Support
For other operating systems please contact TEWS.
Related Products
TPCE210
2 Site QMC Carrier, PCIe x4. Gen2. low-profile, VHDCI-68 I/O
wechat/whatsapp:
+86-181-4410-0983
Email: kongjiangauto@163.com
Copyright © 2009 - 2024 Cld , All Rights Reserved K-JIANG All rights reserved