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Motorola PPMC750-1141 Processor PCI Mezzanine Card

From:Motorola | author:Mr.Chen | Time :2024-08-24 | 461 view: | 🔊 Click to read aloud ❚❚ | Share:

PPMC750-2xxx Description

The PPMC750-2xxx is an extended form factor version of the PPMC750 Processor PCI Mezzanine Card (PPMC) board (see the Processor PMC Standard for VITA-32-199x Processor PCI Mezzanine Cards for more information).

The PPMC750-2xxx is 1.5 times wider than normal at 111 mm. It is based on the PowerPC MPC750 processor and the Hawk PCI host bridge/system memory controller.

Standard features of the PPMC750 include 1MB of L2 cache, an on-board bank of SDRAM (32MB to 128MB), 8MB of FLASH, and optional SDRAM memory expansion.

In addition to the standard features of the PPMC750. the PPMC750-2xxx features 1MB of socketed FLASH, a 10/100TX Ethernet channel, a 190-pin Mictor debug connector, and a serial port debug connector.

Four 64-pin PMC connectors on the PPMC750-2xxx are used to connect the PPMC750-2xxx to the motherboard.

A 10-pin right-angle connector located on the side of the motherboard provides the interface to the asynchronous serial port. A 16-pin header provides the interface to the processor's JTAG/COP port.

A 190-pin Mictor connector on the secondary side of the board provides debug access to the processor bus.

The serial port and JTAG/COP interfaces and ABORT_L signals are also routed to the PMC P14 connector for access to the carrier board.

The PPMC750-2xxx includes a 140-pin AMP connector mounted on the auxiliary side of the board to provide sockets for memory expansion functions.

The presence of this connector increases the height measurement of the components on both sides beyond the standard PMC height.

Monarch and Non-Monarch PPMC

The traditional concepts of host/master and slave/target processors changed with the creation of the PPMC because the arbiter or clock source traditionally located on the host board was not on the PPMC7502xxx.

The VITA 32 specification defines the terms Monarch and Nonmonarch to refer to the two modes of PPMC operation.

Monarch PPMC is defined as the master PCI bus PPMC (or CPU) that performs PCI bus enumeration at power-up or reset and acts as a PCI interrupt handler.

A non-Monarch type is a slave/target processor that does not perform bus enumeration and does not handle PCI interrupts, but may issue PCI interrupts to the host processor.

A system may have a Monarch PPMC750-2xxx and/or one or more non-Monarch PPMC750-2xxx, resulting in a loosely coupled multiprocessing system.

A PPMC750-2xxx operating as a Monarch system may be connected to a carrier board with slave processors, PCI and other I/O devices.

The PPMC750-2xxx operating as a non-monarch system can be mounted on a carrier board with a master processor and other PCI devices such as MVME2400 or MCPN750 boards.

PPMC750-2xxx boards running in non-monarch mode may require a different version of PPCBUG or other operating system than PPMC750-2xxx boards running in monarch mode.

The PPMC750-2xxx software is configured for Monarch or Non-Monarch mode by reading the status of the MONARCH# pin on the PPMC750-2xxx.

This pin is grounded or open on the carrier board to enable the desired mode of operation. Refer to the MONARCH# signal description on page 3-14 of this manual for details.

Carrier Board Requirements The carrier board must provide standard PCI interfaces including 3.3V and 5V power, PCI address/control, PCI clock, and PCI arbiter REQ/GNT pairs.

Refer to the VITA-32-199x specification. The carrier board must also have the MONARCH# pin grounded to enable Monarch operation mode.

Turning the MONARCH# pin on will enable non-Monarch mode.

System Enclosure

System enclosure requirements depend on the configuration and architecture of the baseboard (VME, CompactPCI, or custom), and two slots are required for both the baseboard and the attached PPMC7502xxx (in a VME or CompactPCI chassis).

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