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Motorola MVME6100 VMEbus Boards

From:Motorola | author:Mr.Chen | Time :2024-07-19 | 243 view: | Share:

MVME6100

NXP® MPC7457 VME SBC

The MVME6100 combines the NXP MPC7457 PowerPC® processor with the AltiVec co-processor to deliver real-world bandwidth of up to 320MB/s, enabling technology updates while maintaining backward compatibility.

The MVME6100 series is the first VMEbus board designed with the Tundra Tsi148 VMEbus interface chip, providing dual edge source synchronous transfer (2eSST) VMEbus performance.

The 2eSST protocol allows the VMEbus to operate at a practical bandwidth of 320MB per second in most cases.

The SMART EC MVME6100 series delivers more than just faster VMEbus transfer rates, it provides balanced performance from the processor, memory subsystem, local bus and I/O subsystem.

The MVME6100 series supports booting a wide range of operating systems, including a variety of real-time operating systems and kernels. the MVME6100 series is available with VxWorks board support packages and Linux support.

The MVME6100 is the first VMEbus SBC designed with the Tundra Tsi148 VMEbus interface chip.

2eSST VMEbus protocol with VMEbus transfer rates up to 320MB/s

MPC7457 PowerPC® processor running at up to 1.267GHz

128-bit AltiVec coprocessor for parallel processing, ideal for data-intensive applications

Up to 2GB of on-board DDR ECC memory and 128MB of Flash for demanding applications

Two 33/66/100 MHz PMC-X interfaces allow the addition of industry-standard application-specific modules

Dual Gigabit Ethernet interfaces for high-performance networking

MVME6100 Block Diagram

Overview of the MVME6100

VMEBUS 2ESST Performance

The 2eSST protocol has been around for some time (a draft standard for trial use was released in 1999 and published as an ANSI standard in 2003).

Until now, however, 2eSST boards could not be used on standard VMEbus backplanes because existing VMEbus

Until now, however, 2eSST boards could not be used on standard VMEbus backplanes because existing VMEbus transceivers could not support the required VMEbus 2eSST signal speeds.

Texas Instruments has developed a new VMEbus transceiver that supports the VMEbus signal switching speeds required by the 2eSST protocol.

Texas Instruments' new VMEbus transceivers, combined with the Tsi148 VMEbus legacy protocol support

enables customers to integrate the MVME6100 series into existing infrastructure, providing backward compatibility that

This protects customer investments in existing VMEbus boards, backplanes, chassis and software.

Balanced performance

The MVME6100 series delivers more than just faster VMEbus transfer rates, it provides balanced performance across the processor, memory subsystem, local bus and I/O subsystems.

Processors run at speeds up to 1.267 GHz, ideal for data-intensive applications.

The state-of-the-art host bridge supports a 133 MHz host bus and a 133 MHz DDR memory bus, a perfect match for the processor.

To ensure that the MVME6100 series can handle the 2eSST data transfer rate of 320MB/s, the

Tsi148 VMEbus interface chip is connected to a 133 MHz PCI-X bus on the host bridge.

The second PCI-X bus has two PMC-X positions, each supporting either PMC or PMC-X cards, and supports PCI bus speeds from 33 to 100 MHz.

The MVME6100 also offers dual Gigabit Ethernet interfaces. All of this adds up to a well-balanced, high-performance subsystem that delivers unrivalled performance.

Application Benefits

Defence and Aerospace

In the defence and aerospace market segments, the MVME6100 series is ideally suited to command and control applications using commercial grade products, such as naval bunker systems, fixed ground systems and reconnaissance aircraft systems.

Systems. By using a 1.267GHz processor, the MVME6100 series helps deliver higher performance for these applications than previous VME solutions.

Combined with dual PCI-X buses, the PMC module delivers speeds up to 100 MHz and an 8x increase in VME bandwidth,

eliminating many of the bottlenecks faced by today's command and control solutions. These applications can now take advantage of the latest PowerPC processors in dense computing configurations.

Now these applications can utilise the latest PowerPC processors in dense computing configurations without the hassle of cooling multi-processor boards, managing I/O and VME bottlenecks.

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