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Home ⊙ NEWS ⊙ TEWS TQMC401 4 Channel High Speed Sync/Async Serial Interface
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TEWS TQMC401 4 Channel High Speed Sync/Async Serial Interface

From:TEWS | author:Mr.Chen | Time :2025-08-20 | 4 view: | Share:

Application Information

The TQMC401 is a VITA 93.0 compatible single-width

QMC providing four high speed serial data communication

channels.

The serial communication controller is implemented in

FPGA logic along with the bus master capable PCIe

interface, guaranteeing long term availability and having

the option to implement additional functions in the future.

Data transfer to and from host memory is handled via

TQMC401 initiated DMA cycles for minimum host/CPU

intervention.

Each channel has a receive and transmit FIFO of 512 long

words (32 bit) per channel for high data throughput.

Several serial communication protocols are supported for

each channel, such as asynchronous (with oversampling),

isochronous, synchronous and HDLC mode.

Available signal encodings for synchronous data

communication are NRZ, NRZI, FM0. FM1 and

Manchester.

Available clock sources are 14.7456 MHz for standard

asynchronous baud rates, 10 MHz for the 10 Mbit/s

synchronous data rate and 24 MHz for other baud or data

rates.

Each channel provides various interrupt sources which

can be enabled or disabled individually.

The Differential I/O lines for EIA-422. EIA-485 Full-Duplex

are terminated with 120 Ω on-board.

The TQMC401 is available as air cooled and conduction

cooled variant.

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