Analog data integrity validation
The CT/VT input modules (8L, 8M, 8N, 8R, 8S, 8V) use an analog data integrity
check to verify the performance of the analog measurement channels.
This feature uses an additional analog hardware channel that has as its input,
an analog sum of Sa = Xa – Xb + Xc + Xn, where X stands for either Voltage
or Current phases A, B, C, and N analog inputs, to monitor the integrity of analog data.
After the multiplexer samples analog channels via the sample and hold (S/H) mechanism,
samples from all four channels are summed up digitally, using the same equation to get a digital value Sd.
The “Mean Square” of the difference between the channels is summed up
in the hardware and an equivalent, computed digitally over one protection
pass is supplied to the comparator. If the summed squared difference Σ(Sa – Sd)2
is greater than the adaptable per signal level error boundary,
then “invalid data” is declared and protection functions using the measured data are momentarily blocked.
In addition, if the error keeps repeating, a major self-test diagnostics error message is displayed on the UR.
As a result of such failure, the relay’s self-test alarm contact operates and the relay is taken out of service.
The relay can be rebooted and if no more failures are detected,
it continues to be functional unless a new failure is detected and the relay is again taken out of service.
The above analog data integrity check is performed on both analog banks
(that is, four currents or four voltages) within each CT/VT input module.
In addition, these modules with enhanced diagnostics include power supply
voltage rail monitoring to further monitor hardware health.
This is achieved by continuous check of the power supply voltage Vdc against
safe operate reference voltage Vref, which ensures that all electronic components
of the CT/VT module operate in the safe operating conditions.
wechat/whatsapp:
+86-181-4410-0983
Email: kongjiangauto@163.com
Copyright © 2009 - 2024 Cld , All Rights Reserved K-JIANG All rights reserved